Logic Synthesis for Low Power VLSI Designs formatIsbn:Softcover - 9781461374909 1Ethernet12

1Ethernet12

Bachelorarbeit aus dem Jahr 2009 im Fachbereich BWL - Allgemeines

Da Werktagsgottesdienste häufig unter dem Diktat der Zeit stehen

durch das Ideenwissen -- C

5Kosten-Nutzen-Analyse20

Logic Synthesis for Low Power VLSI Designs formatIsbn:Softcover - 9781461374909 1Ethernet12Logic Synthesis for Low Power VLSI Designs presents a systematic and comprehensive treatment of power modeling and optimization at the logic level. More precisely, this book provides a detailed presentation of methodologies, algorithms and CAD tools for power modeling, estimation and analysis, synthesis and optimization at the logic level. Logic Synthesis for Low Power VLSI Designs contains detailed descriptions of technology dependent logic